SN74HC164N 74HC164 8-Bit Parallel Out Serial Shift Register - TTL - DIP14

The SN74HC164N devices feature AND-gated serial inputs and an asynchronous clear (CLR) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum set-up time requirements are met. Clocking occurs on the low-to-high-level transition of CLK.

Features

Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up to 10 LSTTL Loads
Low Power Consumption, 80-µA Maximum ICC
Typical tpd = 20 ns
±4-mA Output Drive at 5 V
Low Input Current of 1-µA Maximum
AND-Gated (Enable/Disable) Serial Inputs
Fully Buffered Clock and Serial Inputs

Technical data:

Direction Unidirectional
Frequency 62 MHz
Input Current 1 µA
Logic Function Shift Register
Max Operating Temperature 125 °C
Max Supply Voltage 6 V
Min Operating Temperature -40 °C
Min Supply Voltage 2 V
Min Supply Voltage (DC) 2 V
Number of Bits 8
Number of Bits per Element 8
Number of Circuits 1
Number of Elements 1
Number of Input Lines 2
Number of Output Lines 8
Operating Supply Voltage 5 V
Propagation Delay 255 ns
Turn-On Delay Time 255 ns