SN74LS138N 74LS138 Single Supply Decoder Demultiplexer - TTL - DIP16
![](/data/include/deliveries/icons/140025_1.gif)
The LS138 decode one of eight lines dependent on the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.
This decoder/demultiplexer features fully buffered inputs, each of which represents only one normalized load to its driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and to simplify system design.
Technical data:
Bandwidth 35 MHz
High Level Output Current -400 µA
Independent Circuits 1
Input Current 100 µA
Logic Function Decoder, Demultiplexer
Low Level Output Current 8 mA
Max Operating Temperature 70 °C
Max Power Dissipation 1 mW
Max Supply Voltage 5.25 V
Min Operating Temperature 0 °C
Min Supply Voltage 4.75 V
Number of Bits 8
Number of Channels 1
Number of Circuits 1
Number of Elements 1
Number of Input Lines 3
Number of Inputs 3
Number of Output Lines 8
Number of Outputs 8
Operating Supply Voltage 5 V
Polarity Inverting
Propagation Delay 41 ns
Quiescent Current 6.3 mA
Supply Type Single
Turn-On Delay Time 41 ns